ITESO - detalle

Cadence University Program Member

Academic programs where Cadence toolsets are used

Speciality in Design of Systems on a Chip (EDSEC)

Table of Cadence Software that we are using in Classes

Specific CADENCE Tool	Academic Program	Course Name	Number of Students by Semester
Virtuoso	Doctoral Program in Engineering Sciences	Design of digital integrated circuits, Design of analog integrated circuits	4
Encounter, RTL compiler, Static Timic Analysis (STA), Encounter Digital Implementation (EDI), Logical Equivalence Checking (LEC), Conformal Constraint Design – L	Doctoral Program in Engineering Sciences	CAD tools for automation of VLSI circuits, Advanced topics on VLSI circuits, Digital system design	4
Custom IC (Virtuoso)	1.- Master Degree on Electronic Design (MDE)	Advanced Integrated Circuit Design.	20
Custom IC (Virtuoso)	2.- Graduate program in Design of Systems on a Chip (EDSEC)	Digital Integrated Circuit Design, Analog Integrated Circuit Design, Digital System Design,Verification of integrated circuit, CAD tools for automation design of VLSI circuits, Advanced topics of VLSI circuits, Seminar IDI-1, Seminar IDI-2 Seminar IDI-3 and Seminar IDI-4.	12
Custom IC (Virtuoso)	3.-Electronic Engineering Bachelor(IE)	Introduction to integrated circuits	10
Digital IC. (Encounter RTL Compiler)	1.- Master Degree on Electronic Design (MDE)	Digital System Design	20
Digital IC. (Encounter RTL Compiler)	2.- Graduate Program on Integrated Circuits Design	Digital Integrated Circuit Design	14
SPB(PCB) (Alegro)	1.- Master Degree on Electronic Design (MDE)	Printed Circuit Board Workshop	20
SPB(PCB) (Alegro)	2.- Electronic Engineering Bachelor	Circuit Fundamentals, Electronic Circuits	10

Publications
A. Corres-Matamoros, E. Martínez-Guerrero, and J. E. Rayas-Sanchez, "A Programmable CMOS Voltage Controlled Ring Oscillator for Radio-Frequency", Diathermy On-chip Circuit, published in Proceedings of 10th International Caribbean Conference on Devices, Circuits And Systems (ICCDCS2017), June 5-7 2017, Cozumel, México, pp 68 - 68, 2017, DOI: 10.1109/ICCDCS.2017.7959721.
A. Corres-Matamoros, E. Martínez-Guerrero, and J. E. Rayas-Sanchez, "Design and Validation of a Portable Radio-Frequency Diathermy Prototype", published in Proceedings of 10th International Caribbean Conference on Devices, Circuits And Systems (ICCDCS2017), June 5-7 2017, Cozumel, México, pp 93 - 96, 2017, DOI: 10.1109/ICCDCS.2017.7959710.
Corres Matamoros Antonio Rafael, DESIGN AND DEVELOPMENT OF MINIATURIZED LOW-COST SOLUTIONS FOR A PORTABLE RADIO-FREQUENCY DIATHERMY DEVICE, PhD thesis, ITESO, February 2018
Ivan Padilla-Cantoya, Jesus E. Molinar-Solis, and Jaime Ramirez-Angulo "Class AB flipped voltage follower with very low output resistance and no additional power," IEICE Electronics Express, vol. 15, no. 4, pp. 1-7, February 2018 (DOI: 10.1587/elex.15.20171170).
Ivan Padilla-Cantoya, Luis Rizo-Dominguez, and Jesus E. Molinar-Solis, "Capacitance multiplier with large multiplication factor, high accuracy, and low power and silicon area for floating applications," IEICE Electronics Express, vol. 15, no. 3, pp. 1-9, January 2018 (DOI: 10.1587/elex.15.20171191).
Cuauhtémoc R. Aguilera-Galicia, "Design and Implementation of Reciprocal Square Root Units on Digital ASIC Technology For Low Power Embedded Applications", Thesis of Doctoral programm in Engineering Sciences, ITESO, March 2019.
René Saúl Dávila Velarde & Ricardo Ramos Contreras, "Configurable/adaptive digital FIR filter", Thesis of Speciality in Design of System on a Chip graduted programm ITESO, August 9, 2019
René Saúl Dávila Velarde & Ricardo Ramos Contreras, Fabricated chip "adaptive FIR filter for noise canceling in 180 nm in TSMC18 process" through Europractice MiniASIC program.

Software Selection

GRADUATING CLASS PROJECTS 2020

Projet title	Student	Technical directors	Graduate Program
Low Power Modified SAR Converter	Christian Figueroa-Vazquez, Jaime Hernandez-Flores, Iván Martínez-Flores and Mario Moreno-Contreras	Dr. Cuauhtémoc Aguilera-Galicia; Dr. Esteban Martinez-Guerrero	Speciality in Design of system on-Chip
Design of an Offset Compensation System for the Analog Receiver of a SERDES in 130nm CMOS technology	Cesar Arturo Solis Padilla	M.C. Esdras Juárez Hernández	Master in Electronics design
Design of a Sigma-Delta A/D converter in 180 nm CMOS technology for MEMS acceleration sensor	Mario Jiménez González	Dr. Esteban Martinez Guerrero	Master in Electronics design

GRADUATING CLASS 2019 PROJECTS

Projet title	Student	Technical directors	Graduate Program
VLSI implementation of adaptive filtering for noise canceling	René Saúl Dávila Velarde & Ricardo Ramos Contreras	Dr. José Luis Pizano Escalante	Speciality in Design of system on-Chip
Design of an Offset Compensation System for the Analog Receiver of a SERDES in 130nm CMOS technology	Cesar Arturo Solis Padilla	M.C. Esdras Juárez Hernández	Master in Electronics design
Design of a Sigma-Delta A/D converter in 180 nm CMOS technology for MEMS acceleration sensor	Barragan Raúl	Dr. Esteban Martinez Guerrero	Master in Electronics design
Design of an OpAmp with offset cancelation in 180nm CMOS technology for the power plane impedance measurement	Aurelio Rodríguez Echevarría & Edgar Horacio Rodríguez Arruti Vera	Dr. Esteban Martinez Guerrero	Master in Electronics design

GRADUATING CLASS 2018 PROJECTS

Projet title	Student	Technical directors	Graduate Program
Design of Charge-pump and PFD modules of PLL circuit in 130nm CMOS technology	Desiga Orendai Aarón	M. C. Esdras Juarez Hernandez	Master in electronics design
Design of bias circuit for Charge-pump module of PLL circuit in 130nm CMOS technology	González Avalos Diego	Dr. Esteban Martinez Guerrero	Speciality in Design of system on-Chip
Design of VCO module of PLL circuit	Barragan Raúl	Dr. Ivan Padilla Cantoya	Speciality in Design of system on-Chip
High Speed Feedback dividers and Frequency multipliers in 130nm CMOS technology	Flores Francisco Javier	M. Cuauhtémoc Aguilera Galicia, & M. Hector Succar	Speciality in Design of system on-Chip
Pseudo-Random Data Generator in 130nm CMOS technology	Ramirez Carlos Omar	M. Cuauhtémoc Aguilera Galicia, & M. Hector Succar	Speciality in Design of system on-Chip
Adaptive Clock and Data Recovery in 130nm CMOS technology	García Néstor	Dr. Víctor Avendaño Fernández, & Dr. Manuel Salim Maza	Speciality in Design of system on-Chip
Design of a Programmable Impedance Circuit for SERDES Applications in 130nm CMOS technology	Nunez Viara Pedro	M. C. Esdras Juarez Hernandez	Master in electronics design
Design of an Offset Compensation System for the Analog Receiver of a SERDES in 130nm CMOS technology	Solis Padilla Cesar Arturo	M. C. Esdras Juarez Hernandez	Master in electronics design

RESEARCH PROJECTS 2020

Projet title	Student	Technical directors	Graduate Program
Study of On-Chip sensors to maintain or improve digital systems on required operating conditions under PVT variations	Giron Allende Alexandro	Dr. Víctor Avendaño Fernández & Dr. Esteban Martinez Guerrero	PhD. Eng. Sciences

RESEARCH PROJECTS 2019

Projet title	Student	Technical directors	Graduate Program
Study of On-Chip sensors to maintain or improve digital systems on required operating conditions under PVT variations	Giron Allende Alexandro	Dr. Víctor Avendaño Fernández, Dr. Esteban Martinez Guerrero	PhD. Eng. Sciences
On-chip implementation of efficient digital signal processing algorithms.	Aguilera Galicia Cuauhtemoc	Dr. Omar Longoria Gandara, Dr. Manuel Salim Maza	PhD. Eng. Sciences

RESEARCH PROJECTS 2018

Projet title	Student	Technical directors	Graduate Program
Study of On-Chip sensors to maintain or improve digital systems on required operating conditions under PVT variations	Giron Allende Alexandro	Dr. Víctor Avendaño Fernández, Dr. Esteban Martinez Guerrero	PhD. Eng. Sciences
On-chip implementation of efficient digital signal processing algorithms.	Aguilera Galicia Cuauhtemoc	Dr. Omar Longoria Gandara, Dr. Manuel Salim Maza	PhD. Eng. Sciences

GRADUATING CLASS 2017 PROJECTS

Projet title	Student	Technical directors	Graduate Program
Design of Analog Receiver module for a SerDes System on Chip for SGMII protocol applications	Toledo Ojeda Oscar	Dr. Ivan Padilla Cantoya & M.C Federico Lobato Lopez	Speciality in Design of system on-Chip
Design and Physical Implementation of the Analog Transmitter Module for SGMII protocol	Velazquez Meling Alex	Dr. Ivan Padilla Cantoya & M.C Federico Lobato Lopez	Speciality in Design of system on-Chip
Test Modules Design for a SerDes Chip in 130 nm CMOS technology	Miguel Mihail Loria	Dr. Víctor Avendaño Fernández, & Dr. Manuel Salim Maza	Speciality in Design of system on-Chip
Design Serializer Module for a SerDes Mixed Signal System on Chip in 130 nm CMOS Technology	Aparicio Zuleta Christian	Dr. Víctor Avendaño Fernández, & Dr. Manuel Salim Maza	Speciality in Design of system on-Chip
Design of Serializer module of SerDes chip for SGMII protocol applications	Baltazar Cordoba Cesar	Dr. Víctor Avendaño Fernández, & Dr. Manuel Salim Maza	Speciality in Design of system on-Chip
Design of a Programmable Impedance Circuit for SERDES Applications	Nunez Viara Pedro	M.C. Esdras Juarez Hernandez	Master in electronics design
Design of an Offset Compensation System for the Analog Receiver of a SERDES	Solis Padilla Cesar Arturo	M.C. Esdras Juarez Hernandez	Master in electronics design

RESEARCH PROJECTS 2017

Projet title	Student	Technical directors	Graduate Program
Design of on-chip Radio Frequency Diathermy electronic circuit	Corres Matamoros Antonio	Dr. Esteban Martinez Guerrero	PhD. Eng. Sciences
Study of On-Chip sensors to maintain or improve digital systems on required operating conditions under PVT variations	Giron Allende Alexandro	Dr. Víctor Avendaño Fernández, & Dr. Esteban Martinez Guerrero	PhD. Eng. Sciences
On-chip implementation of efficient digital signal processing algorithms.	Aguilera Galicia Cuauhtemoc	Dr. Omar Longoria Gandara, & Dr. Manuel Salim Maza	PhD. Eng. Sciences
Design of analog front-end for electrochemical sensor	Hernandez Rodriguez Josue	Dr. Esteban Martinez Guerrero & Dr. Roman Salinas Cruz	PhD. Eng. Sciences
Design of Transimpedance amplifier for electrochemical sensor	Alfonso Lopez Ledesma	Dr. Esteban Martinez Guerrero	Master in electronics design

GRADUATING CLASS 2016 PROJECTS

Projet title	Student	Technical directors	Graduate Program
Design and Physical Implementation of an Analog Receiver for a SerDes System on Chip in 130nm CMOS Technology	Ernesto Conde Almada	Dr. Esteban Martínez Guerrero & M.C Esdras Juarez Hernández	Speciality in Design of system on-Chip
Design of the Analog Transmitter Module in 130 nm CMOS technology	Joel Antonio Nuñez Corona	Dr. Esteban Martínez Guerrero & M.C Federico Lobato López	Speciality in Design of system on-Chip
Serializer Design for a SerDes chip in 130nm CMOS Technology	Efrain Arrambide Barron	Dr. Víctor Avendaño Fernández, & M.C. Cuauhtémoc Rafael Aguilera Galicia	Speciality in Design of system on-Chip
Design, Implementation and Verification of a Deserializer Module for a SerDes Mixed Signal System on Chip in 130 nm CMOS Technology	Rogelio Rivas Villegas	Dr. Víctor Avendaño Fernández, & M.C. Cuauhtémoc Rafael Aguilera Galicia	Speciality in Design of system on-Chip
Test Modules Design for a SerDes Chip in 130 nm CMOS technology	Cesar Fernando Limones Mora	Dr. Víctor Avendaño Fernández, & M.C. Alexandro Girón Allende	Speciality in Design of system on-Chip

RESEARCH PROJECTS 2016

Projet title	Student	Technical directors	Graduate Program
Design of on-chip Radio Frequency Diathermy electronic circuit	Corres Matamoros Antonio	Dr. Esteban Martinez Guerrero	PhD. Eng. Sciences
Study of On-Chip sensors to maintain or improve digital systems on required operating conditions under PVT variations	Giron Allende Alexandro	Dr. Víctor Avendaño Fernández, & Dr. Esteban Martinez Guerrero	PhD. Eng. Sciences
On-chip implementation of efficient digital signal processing algorithms	Aguilera Galicia Cuauhtemoc	Dr. Omar Longoria Gandara	PhD. Eng. Sciences

TABLE: students in current courses (Spring 2020) of EDSEC graduate program

Students
Christian Figueroa-Vazquez,
Jaime Hernandez-Flores,
Iván Martínez-Flores
Mario Moreno-Contreras

TABLE: students in current courses (Spring 2020) of Master in Electronics design graduate program

Students
Jorge Antonio Araiza-Martinez
Mario Andrés Jiménez-González
Cesar Solis-Padilla
Efraín Castorena-Parra
Abraham Gantus Samed Moises
Ricardo Ontiveros-Torres
Fernando Vera-Zarza

TABLE: students in current courses (Spring 2020) of PhD Eng. Sciences graduate program

Students
Alexandro Giron-Allende
Jesús Abraham Lizarraga-Bañuelos

TABLE: students in current courses (Spring 2019) of EDSEC graduate program

Students
René Saúl Dávila Velarde
Ricardo Ramos Contreras

TABLE: students in current courses (Spring 2019) of Master in Electronics design graduate program

Students
Johnatan Almanza Batres
Jorge Antonio Araiza Martinez
Diego Andrés González Ávalos
Mario Andrés Jiménez González
Cesar Carlos Robles Martínez
Roberto Jorge Ruiz Urbina
Pedro Núñez Viaira
Juan Carlos Abarca González

TABLE: students in current courses (Spring 2019) of PhD Eng. Sciences graduate program

Students
Giron Allende Alexandro

Speciality in Design of system on-Chip/Spring 2017

Students
APARICIO ZULETA CHRISTIAN
CORDOVA BALTAZAR CESAR
HOIL LORIA MIGUEL MIHAIL
TOLEDO OJEDA OSCAR
VELASQUEZ MELING ALEX

Master in Electronics Design/Spring 2017

Students
LOPEZ LEDESMA ALFONSO
NUÑEZ VIAIRA PEDROy
SOLIS PADILLA CESAR ARTURO
HERNANDEZ PADILLA ADOLFO
BAUTISTA GUZMAN ROBERTO
BECERRA PEREZ MOISES
DELGADILLO CASAS FRANCISCO JAVIER
GOMEZ CRUZ CESAR TOMAS
HERNANDEZ PADILLA ADOLFO
JIMENEZ SOTO JOSE ROBERTO
RAMIREZ RUIZ JOSE ABDON
SOTO RAMIREZ GUILLERMO
ABARCA GONZALEZ JUAN CARLOS
BAUTISTA GUZMAN ROBERTO
GOMEZ CRUZ CESAR TOMAS
LARA ESCOTO JUAN CARLOS
SOTO RAMIREZ GUILLERMO

PhD Eng. Sciences/Spring 2017

Students
HERNANDEZ RODRIGUEZ JOSUE
GIRON ALLENDE ALEXANDRO
CORRES MATAMOROS ANTONIO
AGUILERA GALICIA CUAUHTEMOC

Speciality in Design of system on-Chip/Spring 2016

Students
Aaron Desiga Orenday
Rogelio Rivas Villegas
Ernesto Conde Almada
Cesar Fernando Limones Mora
Joel Antonio Nunes Corona
Efrain Arrambide Barron
Alejandro Ivan Arias Garnica

Master in Electronics Design/Spring 2016

Students
HERNANDEZ PADILLA ADOLFO
BAUTISTA GUZMAN ROBERTO
BECERRA PEREZ MOISES
DELGADILLO CASAS FRANCISCO JAVIER
GOMEZ CRUZ CESAR TOMAS
HERNANDEZ PADILLA ADOLFO
JIMENEZ SOTO JOSE ROBERTO
RAMIREZ RUIZ JOSE ABDON
SOTO RAMIREZ GUILLERMO
ABARCA GONZALEZ JUAN CARLOS
BAUTISTA GUZMAN ROBERTO
GOMEZ CRUZ CESAR TOMAS
LARA ESCOTO JUAN CARLOS
SOTO RAMIREZ GUILLERMO

PhD Eng. Sciences/Spring 2016

Students
GIRON ALLENDE ALEXANDRO
CORRES MATAMOROS ANTONIO
AGUILERA GALICIA CUAUHTEMOC

Table: students in the current courses (Spring 2016) of EDSEC graduate program

Sudents
Aaron Desiga Orenday
Rogelio Rivas Villegas
Ernesto Conde Almada
Cesar Fernando Limones Mora
Joel Antonio Núñez Corona
Efrain Arrambide Barron
Alejandro Ivan Arias Garnica

Table: students in the current courses (winter 2015) of EDSEC graduate program

Sudents
Centeno Quiñones José Manuel
Galindo Vergara Adriana Elizabeth
Gallardo Garcia Omar
Godinez Maldonado Ricardo
Gonzalez Mora Graciela Citlali
Hernández Padilla Adolfo
Lazaro Esquivel Juan Carlos
Lópes Felix carlos Cesar
Nuñez Corona Saúl Alfonso

Products 2018	Products 2017	Products 2016	Products 2015
C. R. Aguilera-Galicia, O. Longoria-Gandara, and L. Pizano-Escalante, "Half-precision floating-point multiplier IP core based on 130 nm CMOS ASIC technology," in IEEE Latin-American Conf. on Communications (LATINCOM-2018), Guadalajara, Mexico, Nov. 2018, vol. 1, pp. 1-5. (ISSN: 2330-989X; p-ISBN: 978-1-5386-6755-2; e-ISBN: 978-1-5386-6754-5; DOI: 10.1109/LATINCOM.2018.8613231).	A. Corres-Matamoros, E. Martínez-Guerrero, J.E. Rayas-Sanchez, "A programmable CMOS voltage controlled ring oscillator for radio-frequency diathermy on-chip circuit", pp 63 - 65 (2017). Published in: IEEE, International Caribbean Conference on Devices, Circuits and Systems (ICCDCS), Cozumel, Mexico, 5-7 June 2017, Date added to IEEExplore: June 29 (2017), Electronic ISSN: 2165-3550, INSPEC Accession Number: 16996077, DOI: 10.1109/ICCDCS.2017.7959721	Ernesto Conde Almada, Esdras Juarez Hernandez and Esteban Martinez-Guerrero, "Design and Physical Implementation of an Analog Receiver for a 2.5Gbps SerDes," 2016 IEEE MTT-S Latin America Microwave Conference (LAMC-2016), Puerto Vallarta, Mexico, 12 -14 December 2016, pp 1 - 4, DOI: 10.1109/LAMC.2016.785128	Alexandro Giron-Allende, Victor Avendaño, and Esteban Martinez-Guerrero, "A Design Methodology using Flip-Flops Controlled by PVT Variation Detection," published in IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS 2015), 24-27 Feb. 2015, Montevideo, Uruguay, pp 1 – 4, INSPEC: 15452309, DOI: 10.1109/LASCAS.2015.7250420, ISBN: 978-1-4799-8332-2
C. R. Aguilera-Galicia, O. Longoria-Gandara, L. Pizano-Escalante, J. Vázquez-Castillo, and M. Salim-Maza, "On-chip implementation of a low-latency bit-accurate reciprocal square root unit," Integration - the VLSI Journal, vol. 63, pp. 9-17, Sep. 2018. (ISSN: 0167-9260; published online: 26 May 2018; DOI: 10.1016/j.vlsi.2018.04.016).	A. Corres-Matamoros, E. Martínez-Guerrero, J.E. Rayas-Sánchez, "Design and validation of a portable radio-frequency diathermy prototype", pp. 93 - 96 (2017). Published in: IEEE, International Caribbean Conference on Devices, Circuits and Systems (ICCDCS), Cozumel, Mexico, 5-7 June 2017, Date added to IEEExplore: June 29, 2017, Electronic ISSN: 2165-3550, INSPEC Accession Number: 16996066, DOI: 10.1109/ICCDCS.2017.7959710		Bracamontes-Salazar, R. Juarez-Hernandez, E. Lobato-Lopez, F. and Martinez-Guerrero, E., "CMOS amplifier with self-correction offset for SerDes applications," 16th Latin-American Test Symposium (LATS2015), Puerto Vallarta Mexico, March 25 – 27, 2015, p 1 – 4, 2015, INSPEC:15111162, DOI: 10.1109/LATW.2015.7102409
			Alexandro Giron-Allende, Victor Avendaño, and Esteban Martinez-Guerrero, "A Controllable Setup and Propagation Delay Flip-Flop Design," 16th Latin-American Test Symposium (LATS2015), Puerto Vallarta Mexico, March 25 – 27, 2015, p 1 – 4, 2015, INSPEC:15111162, DOI: 10.1109/LATW.2015.7102409