### Dr. José Ernesto Rayas Sánchez

Department of Electronics, Systems and Informatics

erayas@iteso.mx

Tel. 3669 3598 Ext. 3096

Office: T314

Sitio web Website

PhD in Electrical Engineering from McMaster University, in Hamilton, Ontario, Canada. Master's Degree in Science with a specialization in Electronic Systems from the Instituto Tecnológico de Estudios Superiores de Monterrey (ITESM), in Monterrey, Mexico, and Bachelor's Degree in Electronic Engineering from the Instituto Tecnológico y de Estudios Superiores de Occidente (ITESO).

Dr. Rayas is a member of the editorial board of the following journals: *IEEE Transactions on Microwave Theory and Techniques, IEEE Microwave and Wireless Components Letters, IET Microwaves, Antennas & Propagation Journal, International Journal of RF and Microwave Computer-Aided Engineering (Wiley InterScience),* as well as the journal of IEEE Latin America. He is a member of the Technical Committee of the International Symposium on Microwave Theory of the IEEE (MTT-IMS) and vice president of the *IEEE MTT-1 on CAD (Technical Committee on Computer-Aided Design of the IEEE Microwave Theory and Techniques Society)*. He was the general coordinator of the *First IEEE MTT-S Int. Microwave Workshop Series in Region 9 (IMWS2009-R9) on Signal Integrity and High-Speed Interconnects*, which took place in February of 2009 in Guadalajara, Mexico. From 2004 to 2005 he was President of the Mexican Council of the IEEE, and treasurer of the IEEE for the Latin American region. Since 2013 he has been the regional coordinator of the IEEE MTT-S for Latin America. He currently serves as the president of the *IEEE MTT-S Latin America Microwave Conference (LAMC-2016)*.

In May of 2005 he was named numerary professor at ITESO. His line of research focuses on the development of computer-aided methods for the modeling, design and optimization of high-speed electronic circuits and devices (including RF, microwave and wireless circuits), employing high-precision simulators that involve high computer resource costs, a topic on which he has produced over ninety international publications. His works have been cited by authors in over one thousand [1] scientific publications. His research projects have received funding from the Mexican government through the National Science and Technology Council (CONACYT), from the Spanish government through the Generalitat Valenciana and the Ministry of Education and Science, and from private companies within the electronics industry, such as Intel. He currently coordinates ITESO's PhD program in Engineering Sciences, which is listed on the National Registry of Quality Graduate Programs (PNPC) of Conacyt, and is the director of the Research Group on Computer-Aided Engineering of Circuits and Systems (CAECAS[2]).

**Field of expertise.**

Electromagnetism-based design

RF and microwave circuit design.

Signal integrity.

High-speed interconnections.

CAD methods for electrical circuits.

Circuit optimization.

**Research projects 2015-2016**

*Director of the Research Group on Computer-Aided Engineering of Circuits and Systems (CAECAS). *ITESO collaborators: Dr. Zabdiel Brito Brito, Dr. Omar Longoria Gándara and master's degree and PhD students.

External collaborators: Dr. John W. Bandler, McMaster University, Canada; Dr. Vicente E. Boria, Universidad Politécnica de Valencia, Spain; Dr. Q. J. Zhang, Carleton University, Canada; Dr. Slawomir Koziel, University of Reykjavik, Iceland; Dr. Rodrigo Camacho, Intel Labs Guadalajara, Mexico; Dr. Juan Carlos Cervantes, Intel Labs Guadalajara, Mexico; Dr. Víctor Champac, INAOE Puebla, Mexico; Dr. Roberto Murphy, INAOE Puebla, Mexico; Dr. Carmen Maya, CICESE Ensenada, Mexico; Dr. Raúl Loo, CINVESTAV Guadalajara, México.

**Recent publications**

__Journal articles__

J. E. Rayas-Sanchez, "Power in simplicity with ASM: tracing the aggressive space mapping algorithm over two decades of development and engineering applications," *IEEE Microwave Magazine*, vol. 17, no. 4, pp. 64-76, Apr. 2016. (ISSN: 1527-3342; published online: 7 Mar. 2016; DOI: 10.1109/MMM.2015.2514188)

J. C. Cervantes-González, J. E. Rayas-Sánchez, C. A. López, J. R. Camacho-Pérez, Z. Brito-Brito, and J. L. Chavez-Hurtado, "Space mapping optimization of handset antennas considering EM effects of mobile phone components and human body," *Int. J. RF and Microwave CAE*, vol. 26, no. 2, pp. 121-128, Feb. 2016. (ISSN: 1096-4290; Online ISSN: 1099-047X; published online: 21 Oct. 2015, DOI: 10.1002/mmce.20945)

J. E. Rayas-Sánchez, J. L. Chavez-Hurtado, and Z. Brito-Brito, "Design optimization of full-wave EM models by low-order low-dimension polynomial surrogate functionals," *Int. J. Numerical Modelling: Electron. Networks, Dev. Fields*., vol. **, pp. **-**, ***. 2015. (ISSN: 0894-3370; Online ISSN: 1099-1204; DOI: ***; published online: 13 Sep. 2015, DOI: 10.1002/jnm.2094) (regular publication pending)

L. M. Aguilar-Lobo, J. R. Loo-Yau, J. E. Rayas-Sánchez, S. Ortega-Cisneros, P. Moreno, and J. A. Reynoso-Hernández, "Application of the NARX neural network as a digital predistortion technique for linearizing microwave power amplifiers," *Microwave and Optical Technology Letters*, vol. 57, no. 9, pp. 2137-2142, Sep. 2015. (ISSN: 0895-2477; DOI 10.1002/mop)

J. E. Rayas-Sánchez, D. Pasquet, B. Szendrenyi, and M. S. Gupta, "MTT-S Mexico trip: addressing the RF and microwave community in Mexico," *IEEE Microwave Magazine*, vol. 16, pp. 104-107, Aug. 2015. (ISSN: 1527-3342; DOI: 10.1109/MMM.2015.2431240)

R. Murphy, R. Torres, J. E. Rayas-Sánchez, A. Reynoso, M. Maya-Sánchez, A. Henze, A. Zozaya, P. del Pino, J. Pena, and G. Rafael-Valdivia, "R&D in Latin America: RF and microwave research in Latin America," *IEEE Microwave Magazine*, vol. 15, pp. 97-103, May 2014. (ISSN: 1527-3342; DOI: 10.1109/MMM.2014.2302660)

V. Gutiérrez-Ayala and J. E. Rayas-Sánchez, "Neural input space mapping optimization based on nonlinear two-layer perceptrons with optimized nonlinearity," *Int. J. RF and Microwave CAE*, vol. 20, pp. 512-526, Sep. 2010. (ISSN: 1096-4290; Online ISSN: 1099-047X; IDS: 642LB; DOI: 10.1002/mmce.20457)

__Book chapters__

J. E. Rayas-Sánchez, "Artificial neural networks and space mapping for EM-based modeling and design of microwave circuits," in *Surrogate-Based Modeling and Optimization: Applications in Engineering*, S. Koziel and L. Leifsson, Ed. New York, NY: Springer, 2013, ch. 7, pp. 147-169.

J. E. Rayas-Sánchez, "Neural space mapping methods for EM-based yield estimation," in *Simulation-Driven Design Optimization and Modeling for Microwave Engineering*, S. Koziel, X-S Yang, and Q. J. Zhang, Ed. London, England: Imperial College Press, 2013, ch. 11, pp. 271-310.

__Conference articles__

J. E. Rayas-Sánchez, J. L. Chávez-Hurtado, and Z. Brito-Brito, "Enhanced formulation for polynomial-based surrogate modeling of microwave structures in frequency domain," in *IEEE MTT-S Int. Conf. Num. EM Mutiphysics Modeling Opt. RF, Microw., Terahertz App. (NEMO-2015), *Ottawa, Canada, Aug. 2015, pp. 1-3. (DOI: 10.1109/NEMO.2015.7415094).

Z. Brito-Brito and J. E. Rayas-Sánchez, "Enhanced procedure to set up the simulation bounding box and the meshing scheme of a 3D finite element EM simulator for planar microwave structures," in *IEEE MTT-S Int. Microwave Symp*.* Dig*., Phoenix, AZ, May 2015, pp. 1-3. (ISBN: 978-1-4799-8274-5, INSPEC: 15326132, DOI: 10.1109/MWSYM.2015.7166960).

J. Rafael del-Rey, Z. Brito-Brito, and J. E. Rayas-Sánchez, "Impedance matching analysis and EMC validation of a low-cost PCB differential interconnect," in *IEEE Latin-American Test Symp. (LATS-2015)*, Puerto Vallarta, Mexico, Mar. 2015, pp. 1-5. (INSPEC: 15111168, DOI: 10.1109/LATW.2015.7102514).

J. L. Chávez-Hurtado, J. E. Rayas-Sánchez, and Z. Brito-Brito, "Reliable full-wave EM simulation of a single-layer SIW interconnect with transitions to microstrip lines," in *COMSOL Conf.*, Boston, MA, Oct. 2014, pp. 1-5. (DOI: 10.13140/RG.2.1.2579.1445).

L. M. Aguilar-Lobo, A. Garcia-Osorio, J. R. Loo-Yau, S. Ortega-Cisneros, P. Moreno, J. E. Rayas-Sánchez, and J. A. Reynoso-Hernández, "A digital predistortion technique based on a NARX network to linearize GaN class F power amplifiers," in *IEEE Int.* *Midwest Symp. Circuits Syst.*, College Station, TX, Aug. 2014, pp. 717-720. (ISSN: 1548-3746, P-ISBN: 978-1-4799-4134-6, INSPEC: 14631538, DOI: 10.1109/MWSCAS.2014.6908515).

J. E. Rayas-Sánchez and Z. Brito-Brito, "Research activities on computer-aided modeling, design and optimization of RF and microwave circuits at ITESO Mexico" in *IEEE MTT-S Int. Microwave Symp*.* Dig*., Tampa, FL, Jun. 2014, pp. 1-3. (ISBN: 978-1-4799-3868-1, INSPEC: 14432494, DOI: 10.1109/MWSYM.2014.6848342).

Z. Brito-Brito, J. E. Rayas-Sánchez, J. C. Cervantes-González, and C. A. López, "Impact of 3D EM model configuration on the direct optimization of microstrip structures," in *COMSOL Conf.*, Boston, MA, Oct. 2013, pp. 1-5. (DOI: 10.13140/RG.2.1.3889.8641)

J. C. Cervantes-González, C. A. López, J. E. Rayas-Sánchez, Z. Brito-Brito, and G. Hernández-Sosa, "Return-loss minimization of package interconnects through input space mapping using FEM-based models," in *Proc. SBMO/IEEE MTT-S Int. Microwave Optoelectronics Conf*.*(IMOC-2013)*, Rio de Janeiro, Brazil, Aug. 2013, pp. 1-4. (ISBN: 978-1-4799-1397-8; INSPEC: 13878011, DOI: 10.1109/IMOC.2013.6646607).

J. E. Rayas-Sánchez, Z. Brito-Brito, J. C. Cervantes-González, and C. A. López, "Systematic configuration of coarsely discretized 3D EM solvers for reliable and fast simulation of high-frequency planar structures," in *IEEE Latin American Symp. Circuits and Systems Dig. (LASCAS 2012)*, Cuzco, Peru, Feb. 2013, pp. 1-4. (P-ISBN: 978-1-4673-4897-3; DOI: 10.1109/LASCAS.2013.6519093)

D. Becerra-Pérez and J. E. Rayas-Sánchez, "Optimization of the stub-alternated and serpentine microstrip structures to minimize far-end crosstalk," in *IEEE Conf. Electrical Performance of Electronic Packaging and Systems (EPEPS 2012)*, Tempe, AZ, Oct. 2012, pp. 109-112. (E-ISBN: 978-1-4673-2537-0; P-ISBN: 978-1-4673-2539-4; INSPEC: 13308359, DOI: 10.1109/EPEPS.2012.6457854)

J. E. Rayas-Sánchez, J. Aguilar-Torrentera, Z. Brito-Brito, J. C. Cervantes-González, and C. A. López, "EM simulation of a low-pass filter based on a microstrip defected ground structure," in *COMSOL Conf.*, Boston, MA, Oct. 2012, pp. 1-6. (DOI: 10.13140/RG.2.1.1717.9606)

J. E. Rayas-Sánchez and E. Estrada-Arámbula, "EM-based design optimization of microstrip lines traversing a rectangular gap in the reference plane," in *Int. Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)*, Seville, Spain, Sep. 2012, pp. 197-200. (P-ISBN: 978-1-4673-0685-0; DOI: 10.1109/SMACD.2012.6339451)

J. E. Rayas-Sánchez and Q. J. Zhang, "On knowledge-based neural networks and neuro-space mapping," in *IEEE MTT-S Int. Microwave Symp*.* Dig*., Montreal, Canada, Jun. 2012, pp. 1-3. (ISSN: 0149-645X; E-ISBN: 978-1-4673-1086-4; P-ISBN: 978-1-4673-1085-7; DOI: 10.1109/MWSYM.2011.5972954)

F. Leal-Romo, R. Moreyra-González, and J. E. Rayas-Sánchez, "HFSS automated driver based on non-GUI scripting for EM-based design of high-frequency circuits," in *IEEE Latin American Symp. **Circuits and Systems (LASCAS 2012)*, Playa del Carmen, Mexico, Feb. 2012, pp. 1-4. (P-ISBN: 978-1-4673-1207-3; INSPEC: 12674909; DOI: 10.1109/LASCAS.2012.6180324)

J. E. Rayas-Sánchez and N. Vargas-Chávez, "A linear regression inverse space mapping algorithm for EM-based design optimization of microwave circuits," in *IEEE MTT-S Int. Microwave Symp*.* Dig*., Baltimore, MD, Jun. 2011, pp. 1-4. (ISSN: 0149-645X; E-ISBN: 978-1-61284-756-6; P-ISBN: 978-1-61284-754-2; INSPEC: 12180836; DOI: 10.1109/MWSYM.2011.5972954)

J. E. Rayas-Sánchez, "EM-based design optimization of RF and microwave circuits using functional surrogate models," in *IEEE MTT-S Int. Microwave Symp*.* Workshop Notes and Short Courses*, Baltimore, MD, Jun. 2011.

D. Becerra-Pérez and J. E. Rayas-Sánchez, "Driving Sonnet through a Python-based interface," in *Int. Review of Progress in Applied Computational Electromagnetics (ACES 2011)*, Williamsburg, VA, Mar. 2011, pp. 412-417.

J. E. Rayas-Sánchez and N. Vargas-Chávez, "Design optimization of microstrip lines with via fences through surrogate modeling based on polynomial functional interpolants," in *IEEE Conf. Electrical Performance of Electronic Packaging and Systems (EPEPS 2010)*, Austin, TX, Oct. 2010, pp. 125-128. (E-ISBN: 978-1-4244-6866-9; P-ISBN: 978-1-4244-6865-2; INSPEC: 11664332)

J. E. Rayas-Sánchez and D. E. Cordero-Baltazar, "Impact of base points distributions on the polynomial surrogate modeling of a substrate integrated waveguide with microstrip transitions," in *Electronics, Robotics and Automotive Mechanics Conf. **(CERMA 2010)*, Cuernavaca, Mexico, Sep. 2010, pp. 705-710. (P-ISBN: 978-1-4244-8149-1; INSPEC: 11761600; DOI: 10.1109/CERMA.2010.80)

J. E. Rayas-Sánchez, J. Aguilar-Torrentera and J. A. Jasso-Urzúa, "Surrogate modeling of microwave circuits using polynomial functional interpolants," in *IEEE MTT-S Int. Microwave Symp*.* Dig*., Anaheim, CA, May 2010, pp. 197-200. (ISSN: 0149-645X; E-ISBN: 978-1-4244-6057-1; P-ISBN: 978-1-4244-6056-4, INSPEC: 11453118; DOI: 10.1109/MWSYM.2010.5517648)

S. Ogurtsov, S. Koziel and J. E. Rayas-Sánchez, "Design optimization of a broadband microstrip-to-SIW transition using surrogate modeling and adaptive design specifications," in *Int. Review of Progress in Applied Computational Electromagnetics (ACES 2010)*, Tampere, Finland, Apr. 2010, pp. 878-883.

__Other publications__

E. R. Villa-Loustaunau and J. E. Rayas-Sánchez, "A parameter extraction process for equivalent circuit models of a composite right/left-handed transmission line," Internal Report CAECAS-13-10-R, ITESO, Tlaquepaque, Mexico, Dec. 2013.

J. García-Bedoy-Torres and J. E. Rayas-Sánchez, "Yield optimization of high-frequency circuits exploiting a multi-threaded implementation," Internal Report CAECAS-13-06-R, ITESO, Tlaquepaque, Mexico, Nov. 2013.

M. R. Bueno-Pérez and J. E. Rayas-Sánchez, "Final study of a bus of four microstrip lines for high-speed interconnect applications using Sonnet and APLAC," Internal Report CAECAS-14-02-R, ITESO, Tlaquepaque, Mexico, Jul. 2014.

F. Rangel-Patiño and J. E. Rayas-Sánchez, "Worst-case and statistical eye diagrams for multi-gigabit interconnect channels," Internal Report PhDEngScITESO-14-10-R (CAECAS-14-11-R), ITESO, Tlaquepaque, Mexico, Dec. 2014.

M. R. Bueno-Pérez and J. E. Rayas-Sánchez, "Full-wave EM simulation of four-cascaded CRLH unit-cells microstrip structure using Sonnet," Internal Report CAECAS-14-09-R, ITESO, Tlaquepaque, México, Dec. 2014.

F. Rangel-Patiño, J. E. Rayas-Sánchez, and N. Hakim, "Challenges and opportunities in post-silicon electrical validation of high speed I/O's," Internal Report PhDEngScITESO-14-08-R (CAECAS-14-08-R), ITESO, Tlaquepaque, Mexico, Oct. 2014

M. R. Bueno-Pérez and J. E. Rayas-Sánchez, "Full-wave EM simulation of a CRLH unit-cell microstrip structure using Sonnet," Internal Report CAECAS-14-06-R, ITESO, Tlaquepaque, Mexico, Oct. 2014.

J. L. Chávez-Hurtado and J. E. Rayas-Sánchez, "Four benchmark microstrip line models," Internal Report PhDEngScITESO-14-03-R (CAECAS-14-04-R), ITESO, Tlaquepaque, Mexico, Jul. 2014.

F. Rangel-Patiño and J. E. Rayas-Sánchez, "Computer-aided design: historical review, state of the art, and future trends," Internal Report PhDEngScITESO-14-01-R (CAECAS-14-03-R), ITESO, Tlaquepaque, Mexico, Jul. 2014.

F. E. Rangel-Patiño and J. E. Rayas-Sánchez, "Equalizers for high-speed serial links," Internal Report PhDEngScITESO-16-01-R (CAECAS-16-01-R), ITESO, Tlaquepaque, Mexico, Jan. 2016.

J. R. del-Rey, Z. Brito-Brito, and J. E. Rayas-Sánchez, "Modeling of a low-cost PCB differential interconnect using several commercially available simulators," Internal Report PhDEngScITESO-15-19-R (CAECAS-15-17-R), ITESO, Tlaquepaque, Mexico, Dec. 2015.

F. E. Rangel-Patiño and J. E. Rayas-Sánchez, "System marginality validation: an on-die silicon test methodology," Internal Report PhDEngScITESO-15-17-R (CAECAS-15-16-R), ITESO, Tlaquepaque, Mexico, Dec. 2015.

J. Robledo-Mariscal and J. E. Rayas-Sánchez, "A minimax formulation for a time domain numeric optimization of a non-spec-compliant USB3 topology," Internal Report CAECAS-15-15-R, ITESO, Tlaquepaque, Mexico, Dec. 2015.

J. L. Chávez-Hurtado and J. E. Rayas-Sánchez, "General formulation for polynomial-based surrogate modeling of microwave structures in frequency domain using the multinomial theorem," Internal Report PhDEngScITESO-15-12-R (CAECAS-15-14-R), ITESO, Tlaquepaque, Mexico, Nov. 2015.

F. J. Leal-Romo, J. E. Rayas-Sánchez, and J. He, "Power delivery challenges for cloud computing applications," Internal Report PhDEngScITESO-15-11-R (CAECAS-15-13-R), ITESO, Tlaquepaque, Mexico, Nov. 2015.

J. R. Alejos-Jiménez and J. E. Rayas-Sánchez, "Basic concepts on simulated annealing and its applications," Internal Report CAECAS-15-12-R, ITESO, Tlaquepaque, Mexico, Aug. 2015.

F. J. Leal-Romo, J. E. Rayas-Sánchez, and J. He, "Power conversion in power delivery networks," Internal Report PhDEngScITESO-15-09-R (CAECAS-15-11-R), ITESO, Tlaquepaque, Mexico, Aug. 2015.

J. L. Chávez-Hurtado and J. E. Rayas-Sánchez, "Polynomial surrogate modeling based on the multinomial theorem," Internal Report PhDEngScITESO-15-08-R (CAECAS-15-10-R), ITESO, Tlaquepaque, Mexico, Aug. 2015.

F. E. Rangel-Patiño and J. E. Rayas-Sánchez, "Towards a suitable objective function formulation for equalizer optimization for post-silicon electrical validation," Internal Report PhDEngScITESO-15-06-R (CAECAS-15-09-R), ITESO, Tlaquepaque, Mexico, Jun. 2015.

J. L. Chávez-Hurtado and J. E. Rayas-Sánchez, "Surrogate modeling using polynomials," Internal Report PhDEngScITESO-15-05-R (CAECAS-15-08-R), ITESO, Tlaquepaque, Mexico, Jun. 2015.

J. E. Gutiérrez-Morales and J. E. Rayas-Sánchez, "Analysis of the distributed capacitance and the electromagnetic fields of a microstrip line using COMSOL," Internal Report CAECAS-15-06-R, ITESO, Tlaquepaque, Mexico, May 2015.

J. García-Bedoy-Torres and J. E. Rayas-Sánchez, "The harmonic balance algorithm and a python implementation," Internal Report CAECAS-15-05-R, ITESO, Tlaquepaque, Mexico, May 2015.

F. J. Leal-Romo, J. E. Rayas-Sánchez, and J. He, "Power delivery design methodologies," Internal Report PhDEngScITESO-15-03-R (CAECAS-15-04-R), ITESO, Tlaquepaque, Mexico, Apr. 2015.

J. García-Bedoy-Torres and J. E. Rayas-Sánchez, "Netlist parsing and related infrastructure for circuit simulation," Internal Report CAECAS-15-03-R, ITESO, Tlaquepaque, Mexico, Apr. 2015.

F. J. Leal-Romo, J. E. Rayas-Sánchez, and J. He, "An introduction to power delivery," Internal Report PhDEngScITESO-15-02-R (CAECAS-15-02-R), ITESO, Tlaquepaque, Mexico, Feb. 2015.

F. Rangel-Patiño and J. E. Rayas-Sánchez, "Eye-diagram approaches and their correlation for high speed interconnects analysis," Internal Report PhDEngScITESO-15-01-R (CAECAS-15-01-R), ITESO, Tlaquepaque, Mexico, Feb. 2015.

[1] Google scholar: http://scholar.google.com.mx/citations?user=YhsODCoAAAAJ&hl=en

[2] CAECAS web: http://desi.iteso.mx/caecas/